Entry Level DFT Design Engineer

In this role, you will:

• Participate in global Design teams bringing new microprocessor based SoC designs through initial test requirements to generating and supporting DFT structural test pattern debug and into full scale production.
• Team functions include test pattern specification and creation, pre-silicon verification, pattern conversions to ATE, and post-silicon pattern debug.
• Team is a part of the design organization and supports the Test Engineering team with the patterns for manufacturing test, qualification, yield enhancement, and product performance analysis.
• Team serves as focal point in interfacing with Test Engineering, Product Engineering, and Fab for the Design team.
• Team specifies built-in test features for the designs, implements, and validates the design. Team is responsible for delivery of all DFT test patterns for the product.

• Recent graduate (0-2yrs) with Bachelors or Masters in Engineering: EE, Computer Engineering, CS, EET, or equivalent

• Python, Verilog, Perl, Tcl, and Unix.

• Experience with multiple aspects of the following:

• Structural Test design requirements

• ATPG, Test Coverage, Fault Universe

• JTAG, BSDL

• Memory and Logic BIST

• DFT Logic

• Knowledge/experience with ATPG / DFT tools: FastScan; LBIST, MBIST , DFTCompiler, etc.

• Semiconductor Testing

• ATE VLSI Tester programming and usage (J973, Tiger/Catalyst, UltraFex, or Verigy 93000, ) a plus

• Knowledge/experience with functional pattern test

• Must possess excellent oral and written communication skills and be to partner with team members from other departments, disciplines, and cultures to achieve common goals in a high performance culture. Must have proven track record of being able to work with minimal direction and still meet schedules

• Must be able to multi-task and prioritize tasks to meet customer needs